Postdoc Subject 1 in Nancy

Title: Abstract modeling of faults and errors in FPGA resources and high-level specification for fault and error handling

postdoc at LIEN

The analysis of the behavior of different types of FPGA resources (CLBs, BRAM, arithmetic blocks, configuration memory) in the presence of faults will be presented. It should take into account that the type of affected resources (as above) and the time duration of the fault (temporary or permanent) may have different effects on the application executed by the FPGA device. For instance, some faults may cause no errors or may cause errors which have no impact on the correct functioning. Depending on whether the fault affects the results of computation or the configuration, a different error recovery procedure should be triggered (these procedures should be proposed here). The study should take into account the high abstraction level for the latter: (i) it is immaterial what type of fault detection techniques were actually used, and (ii) only the origin of the error signal counts. The study should propose the specification of various faults/errors handling scenarios as complete and general as possible. These would serve as the input to the upper level of error handling procedure that should be capable to distinguish whether the fault detected is temporary or permanent and then suitably continue error recovery (temporary fault) or error recovery and reconfiguration (permanent fault).