Engineer Position in Brest

Title: Introspection plan compliant EDA toolset

Engineer position co-supervised by Lab-STICC and IRISA

To the best of our knowledge very few efforts have been reported in design of debug friendly EDA toolset. The work will contribute to refactor the existing toolset in order to take into account new paradigms such as to combine the computation plan and the instrospection plan of the proposed architecture. In addition, debug controllers will be made available on-demand within the netlist of the application in
order to alleviate the need for dedicated resources and further trade-off will be investigated. This offers new exciting perspectives, in a domain space exploration (DSE) scope. A model oriented approach will be considered to ensure the durability of the resulting software and of its design method. Dissemination will both happen in hardware and software-engineering scientific communities. Main perspectives are to
deliver a gifted backend to HLS frontend, which would support cross-layer and multi-level optimizations, as well as to let a generic device driver layer to arise, which would serve some primitives to an extended management layer. This work will be co-supervised by the Lab-STICC A&S and IRISA. The engineer will be at Brest in the A&S team.